1. Field of the Invention
The present invention relates to computer systems and, more particularly, to a data bus for isochronous data within computer systems.
2. Description of the Related Art
Computer systems, such as personal computer systems, were originally developed for business applications such as word processing, databases and spread sheets, among others. Computer systems, however, are currently being used to handle a number of isochronous tasks including: multimedia applications having video and audio components, video capture and playback, telephony applications, and speech recognition and synthesis, among others. Generally speaking, isochronous tasks are time-dependent tasks. In other words, the data handled by an isochronous task must be delivered or processed within certain time constraints.
One problem that has arisen is that computer systems originally designed for business applications are not well suited to the time-dependent requirements of modem multimedia applications. For example, modem computer system architectures still presume that the majority of applications executed are business applications, such as word processing or spread sheet applications. Typical computer systems are inefficient at handling streams of time-dependent data, or isochronous data, that make up multimedia data types. The isochronous data of multimedia tasks require the maintenance of a temporal component. For example, audio signals are coded as a stream of samples taken at a consistent sampling rate. The temporal relationship between these samples must be maintained to prevent perceptible errors such as gaps or altered frequencies. Likewise, the loss of the temporal relationship in a video signal can cause blank screens or lines.
The bus structures in typical computer systems are not designed to handle isochronous data. Bus contention, delays and overhead prevent buses, such as the Peripheral Component Interconnect (PCI) bus, from reliably transferring data at precise intervals as required for isochronous data.
Several data bus protocols have been developed to facilitate the transfer of isochronous data within computer systems. These standards include the I.sup.2 S bus defined by Philips and the Audio Codec '97 (AC '97) bus defined by Intel. To reduce cost, these buses are serial buses rather than parallel buses. Unfortunately, these serial buses do not efficiently support multiple data streams with different sample rates. This is especially true when there is no clear relationship between the sample rates of the various data streams (e.g., where the sample rates of the data streams are not multiples or divisors of each other). One method of combining data streams having different sampling rates is to convert the data to a common sample rate. This conversion may be performed by using interpolation and/or decimation. Unfortunately, data conversion is a time consuming and hardware intensive task. Further, to convert the data back to the original sample rate, requires information identifying the original sample rate to be transmitted with the data.
A further shortcoming of conventional buses for transmitting isochronous data is the inability to detect and compensate for clock drift between sample clocks within the computer system. Techniques for compensating for clock drift include phase-lock loop techniques and interpolation. Unfortunately, these techniques are hardware intensive and/or time consuming.
What is desired is an isochronous bus that efficiently handles multiple isochronous data streams with different, non-related sample rates. It is further desirable to detect and correct clock drift between multiple clocks within the computer system.